1. Field of the Invention
The integration of complex electronic systems on a single chip often requires the presence of both digital and analog circuits implemented by the same fabrication process. Lately an evolution of digital techniques has permitted an extension of their utilization to implement an ever increasing number of functions (e.g. filtering). However the circuits which allow interfacing a digital system with the real world such as those for analog-digital and digital-analog conversion and for amplification, remain unreplaceable analog type circuits.
In particular at the output of integrated systems an interface circuit capable of providing a correct output signal independently of the load conditions imposed by an external user remains necessary. This kind of interfacing is generally implementing by means of a power operational amplifier. The latter is a circuit capable of driving capacitive (up to several hundreds picofarads) and resistive loads (down to few hundreds ohms). Many integrated circuits, commonly made by means of bipolar technology, performing only this function are commercially available. These integrated devices may be connected in cascade to complex integrated circuits as power interfaces towards the real world. Lately it has been made possible to integrate also these interface circuits in the same integrated circuit containing a certain processing system and achieving a good performance therefrom. Generally the technology utilized for making complex monolithically integrated systems is the so-called MOS (Metal-Oxide-Semiconductor) technology, therefore analog circuits designers are actively engaged in designing MOS power operational amplifiers showing better and better characteristics.
These characteristics may be listed as follows: ability of driving ever more heavier loads with maximum voltage excursions as close as possible to the value of the supply voltages, good rejection of noise coming from supplies, low output impedance, low power dissipation and a small area requirement.
2. Discussion of the Prior Art
A power operational amplifier is commonly formed by two stages (FIG. 1). An input stage which differentially picks up a signal and amplifies it, followed by a power output stage. The first stage is commonly a simple differential amplifier or a "folded cascode" amplifier, notably having a higher gain, (these amplifiers are well known to analog MOS circuits designers and are amply described in the volune "Analog MOS integrated circuits for signal processing", Gregorian Temes). For the second or power output stage various solutions exist and are herein below briefly recalled.
The source follower output stage (FIG. 2) is similar to the well known bipolar emitter follower circuit. The common drain configuration used is characterized by a voltage gain lower than unity, by a wide band and by a high current gain. A disadvantage is the low output dynamic which is limited because the output voltage Vout may raise only to a value equal to Vcc-Vgs, where Vgs is the voltage developed between gate and source which may have a rather high value when the transistor must apply a strong current for driving heavy resistive loads. Moreover the rest power dissipation is rather heavy in so far the transistor acting as a current generator must draw a direct current greater than the maximum current which may be delivered to the load in presence of an input signal.
In order to improve the output voltage swing (dynamic) the output MOS transistor M1 may be replaced by a bipolar transistor (FIG. 3) which may be formed during a basic CMOS fabrication process without any additional processing step. In this case the output voltage may raise up to about Vcc-0.7 (Volts). The problems relative to a high power dissipation under rest conditions and to the necessity of providing a relatively sturdy input stage capable of driving the rather low input impedance of the bipolar transistor output stage (few kilo-ohms instead of few giga-ohms as in the case of a MOS transistor) remain. Moreover bipolar transistors made by a CMOS fabrication process notably have rather poor intrinsic characteristics.
Another output stage is the "push-pull" stage (FIG. 4). This stage operates in class AB; i.e. in the absence of an input signal, M5 and M6 are only slightly conducting and therefore they dissipate a smaller power. The current circulating through the output transistors depends from the signal. A low output dynamic remains a drawback of this solution. The output voltage swing is in fact limited to a volate equal to Vgs from both sides of the supply.
Lately a much utilized output stage is that depicted in FIG. 5. The amplifiers A1 and A2 (called error amplifiers) are provided with feedback from the output to the non-inverting input thereof utilizing the voltage and Vgd existing across the gate and drain of the relative output MOS transistor and they must supply to the output a d.c. voltage having a value such as to provide a correct bias current through the output transistors. From a signal stand point, the two amplifiers behave as unitary gain, noninverting buffers carrying the output signal (i.e. Vout=Vin). If Vin raises the voltage at nodes A and B falls and therefore transistor M1 is capable of providing the whole current needed by the load while transistor M2 may ultimately be switched-off (viceversa if Vin drops). This solution besides requiring two additional error amplifiers is strongly affected by offset. An offset voltage is generated when pairs of transistor which ideally should be identical (such as the the input pair of a differential stage or the transistor pair forming a current mirror) are not identical because of local variations in the fabrication process. Consequently voltages or currents which in theory should be equal are not so thus unbalancing the operation of a certain circuit.
An offset between the two error amplifiers, as depicted in FIG. 6, may change the d.c. driving voltage of M1 and M2 in such a way that the bias current in both trannsistors becomes very small in one case or increases very much in another case. Variations of up to 10:1 of the power dissipated may so take place and this is often unacceptable. Special control circuits of the output current are needed and this complicates further the overall design.
Moreover an attendant problem to be kept in consideration is the stability of the loop comprising the amplifier A1 and the transistor M1 and of the loop comprising the amplifier A2 and the transistor M2. The cascade of the amplifier (A1 or A2) and of the transistor (M1 or M2) may be considered in fact as a two stages amplifier. It is well known that a two stages amplifier requires one or more compensating capacitors. Without these the phase shift introduced by the two stages in cascade may conduct to oscillation or at the least may cause a step response containing an acceptable damped oscillation. A first compensating method contemplates connecting a capacitor between the output of the power output stage and the output of said first stage. This method is effective, however supply's noise rejection greatly decreases at high frequencies. This fact is immediately appreciated by observing the simplified examples depicted in FIG. 7A (for the cascade A1 and M1) and in 7b (for the cascade A2 and M2), wherein the first or the input stage is a differential stage, the second or output power stage is a common source amplifier and Cc is a compensation capacitor. At the frequency at which the capacitors Cc tend to behave as short circuits, the M1 and M2 transistors become diode-connected and constitute a low impedance path between the output node and the supplies (the transistors being equivalent to resistances of 1/gm value, wherein gm is the transconductance of the MOS transistors). Any noise on the supply is therefore entirely transferred to the output.
A second compensation method capable of diminishing the effect of noise present on the supply has been described in the article "An improved frequency compensation technique for CMOS operational amplifier" by Bhupendra Ahuia, IEEE JSSC, December 1983, and is illustrated in FIG. 8. As known to the skilled technician, at frequencies at which the compensation capacitor Cc behaves as a short circuit the output signal follows the source of transistor Q which in turn is tied to ground, if the transconductance gm thereof is sufficiently large, and therefore is not affected by disturbances on the supply. A disadvantage of this solution is that the two MOS transistors with which the current generators I are made must given exactly the same current notwithstanding one being a P-channel and the other an N-channel transistor (this being rather difficult to obtain), otherwise the offset at the input of the amplifier becomes very large. In fact any unbalance (I) between these two MOS transistors causes the voltage of node A to vary by a quantity V equal to Ra I, where Ra is the total impedance seen from node A. This voltage variation V is converted in an output current variation Iout equal to gm.sub.M1 V and in turn this output current variation Iout develops a voltage variation Vout equal to Ru Iout, where Rout is the total impedance seen from the output node. By dividing Vout by the input-to-output, open loop gain gm.sub.in Ragm.sub.M1 Rout an input offset voltage equal to I/gm.sub.in is generated.